Browsing by Author "Ayav, T."

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Citation Count: 9
Adaptive RTP rate control method
(2011) Tos, U.; Ayav, T.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
In this paper, we present an adaptive method for maximizing network bandwidth utilization for the real-time applications. RTP protocol is chosen as the transport protocol and the network utilization is provided by increasing and decreasing the transmission rate of the RTP traffic. Our method employs a PID controller that keeps the RTP packet loss fraction at a predefined reference point. Packet loss fraction parameter is gathered from the RTCP receiver reports and fed into the PID controller that controls the transmission rate of the RTP traffic. Simulations are performed to demonstrate the effectiveness of the method under a bottleneck network configuration with background UDP traffic competing against the RTP traffic for the available bandwidth. © 2011 IEEE.
Evaluation of Scheduling Architectures for OSEK/VDX Compliant Hard Real-Time Operating Systems
(Institute of Electrical and Electronics Engineers Inc., 2020) Saydam, B.; Ayav, T.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
Developing technology is reflected to the vehicles as well. But it brings the challenge of adding new functionalities to vehicles without compromising safety. The chips, which are used to provide the functionalities, are determined in the first step of ECU design. This decision will effect the remaining part of the development. Designing hardware and software together with testing phase is a long process in automotive industry. Changing the design of the hardware is quite costly after an ECU begins to be used in field. For these reasons, the selection of chips is directly related to cost and the functionality which should be provided to customer. Tasks, which fulfill desired functionality, provide a balance between performance and safety. These were evaluated for an OSEK/VDX certified OS and results are presented from the scheduling algorithms point of view. © 2020 IEEE.
Citation Count: 1
Feedback control static scheduling for real-time distributed embedded systems
(2005) Ayav, T.; Sorel, Y.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
This paper presents an implementation of feedback control strategy on distributed static scheduling. The static schedule is created taking into account the average execution times of the tasks. Feedback control algorithm handles the unestimated dynamic behaviors in the system and keeps the performance at a desired level. The approach of feedback control supporting static scheduling yields more flexible scheduling, low scheduling overhead and better resource utilization while preserving the realtime constraints. © 2005 IEEE.
Fourier analysis-based automatic test pattern generation for combinational circuits
(Institute of Electrical and Electronics Engineers Inc., 2015) Ayav, T.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
Fourier analysis of boolean functions has attracted great attention from computer scientists in the last decade but it still has few application areas. This work presents a Fourier analysis-based automatic test pattern generation method for combinational circuits. © 2015 IEEE.
Fourier analysis-based testing of finite state machines
(CEUR-WS, 2018) Takan, S.; Ayav, T.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
Finite State Machine (FSM), as a formal modeling technique to represent both circuits and software, has been widely used in testing. FSM testing is a well-studied subject and there are several test generation methods. However, the current increase in the demand for pervasive and safety critical systems as well as the increase in software size calls for more rigorous methods that can produce more effective test suites particularly in terms of size, time spent for test generation and fault detection ratio. In this study, we propose a new test generation method based on the Fourier analysis of Boolean functions. An analysis on the effects of the various frequency components of the function output allow us to generate test suites with better performance characteristics. We compare our F-method with the two existing methods.
Citation Count: 4
Full-exact approach for frequent itemset hiding
(IGI Global, 2015) Ayav, T.; Ergenc, B.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
This paper proposes a novel exact approach that relies on integer programming for association rule hiding. A large panorama of solutions exists for the complex problem of itemset hiding: from practical heuristic approaches to more accurate exact approaches. Exact approaches provide better solutions while suffering from the lack of performance and existing exact approaches still augment their methods with heuristics to make the problem solvable. In this case, the solution may not be optimum. This work presents a full-exact method, without any need for heuristics. Extensive tests are conducted on 10 real datasets to analyze distance and information loss performances of the algorithm in comparison to a former similar algorithm. Since the approach provides the optimum solution to the problem, it should be considered as a reference method. Copyright © 2015, IGI Global.
Citation Count: 3
Human–robot interfaces of the neuroboscope: A minimally invasive endoscopic pituitary tumor surgery robotic assistance system
(American Society of Mechanical Engineers (ASME), 2021) Dede, M.I.C.; Kiper, G.; Ayav, T.; Ozdemirel, B.; Tatlıcıoglu, E.; Hanalioglu, S.; Berker, M.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
Endoscopic endonasal surgery is a commonly practiced minimally invasive neurosurgical operation for the treatment of a wide range of skull base pathologies including pituitary tumors. A common shortcoming of this surgery is the necessity of a third hand when the endoscope has to be handled to allow active use of both hands of the main surgeon. The robot surgery assistant NeuRoboScope system has been developed to take over the endoscope from the main surgeon’s hand while providing the surgeon with the necessary means of controlling the location and direction of the endoscope. One of the main novelties of the NeuRoboScope system is its human–robot interface designs which regulate and facilitate the interaction between the surgeon and the robot assistant. The human–robot interaction design of the NeuRoboScope system is investigated in two domains: direct physical interaction (DPI) and master–slave teleoperation (MST). The user study indicating the learning curve and ease of use of the MST is given and this paper is concluded via providing the reader with an outlook of possible new human–robot interfaces for the robot assisted surgery systems. Copyright VC 2021 by ASME
Citation Count: 9
Identifying critical architectural components with spectral analysis of fault trees
(Elsevier Ltd, 2016) Ayav, T.; Sözer, H.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
We increasingly rely on software-intensive embedded systems. Increasing size and complexity of these hardware/software systems makes it necessary to evaluate reliability at the system architecture level. One aspect of this evaluation is sensitivity analysis, which aims at identifying critical components of the architecture. These are the components of which unreliability contributes the most to the unreliability of the system. In this paper, we propose a novel approach for sensitivity analysis based on spectral analysis of fault trees. We show that measures obtained with our approach are both consistent and complementary with respect to the recognized metrics in the literature. © 2016 Elsevier B.V.
A Lightweight and Energy Efficient Secrecy Outage Probability-based Friendly Jamming
(Institute of Electrical and Electronics Engineers Inc., 2023) Yaman, O.; Ayav, T.; Erten, Y.M.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
Third parties and legitimate entities can reach and process users' private data through most wireless networks. However, attackers such as intruders and eavesdroppers may also try to exploit this property in communication. Hence, wireless networks are intrinsically more vulnerable to threats, unlike their wired alternatives. Cryptographic techniques are the conventional approaches to deal with that weakness. Nevertheless, they still need to meet the requirements of contemporary technologies, including IoT nodes with energy and processing power constraints. In that respect, friendly jamming (FJ) is one of the encouraging countermeasures to overcome the mentioned susceptibility since it has an energy-efficient and computation-friendly nature. However, that promising approach brings another challenge, applicability. Although various models exist against this issue, a lightweight scheme compliant with novel technologies is needed. Hence, we propose a more straightforward FJ model evaluated on cellular network-based simulations in this study. Moreover, introducing a lightweight secrecy outage probability definition increases robustness and energy efficiency. © 2023 IEEE.
Model based testing of VHDL programs
(IEEE Computer Society, 2015) Ayav, T.; Tuglular, T.; Belli, F.; Tuğlular, Tuğkan; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
VHDL programs are often validated by means of test benches constructed from formal system specification. To include real-time properties of VHDL programs, the proposed approach first transforms them to concurrently running network of timed automata and then performs model checking on properties taken from the specification. Counterexamples generated by the model checker are used to form a test bench. The approach is validated by a case study composed of a nontrivial application running on a microprocessor. As presented, the approach enables testing both hardware and software at once. © 2015 IEEE.
Model based testing of VHDL programs
(IEEE Computer Society, 2015) Ayav, T.; Tuglular, T.; Belli, F.; Tuğlular, Tuğkan; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
VHDL programs are often validated by means of test benches constructed from formal system specification. To include real-time properties of VHDL programs, the proposed approach first transforms them to concurrently running network of timed automata and then performs model checking on properties taken from the specification. Counterexamples generated by the model checker are used to form a test bench. The approach is validated by a case study composed of a nontrivial application running on a microprocessor. As presented, the approach enables testing both hardware and software at once. © 2015 IEEE.
Neden-Sonuç Çizgelerinden Test Girilerinin Oluturulmas
(CEUR-WS, 2016) Kavzak, D.; Ayav, T.; Belli, F.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
Cause-effect graphing is a well-known requirement based testing technique. However, since it was introduced by Myers in 1979, there seems not to have been any suffciently comprehensive studies to generate test cases from these graphs. This paper proposes to convert cause-effect graphs into Boolean expressions and find out the test cases using test input generation techniques for Boolean expressions, such as MI, MAX-A and CUTPNFP. Mutation analysis is used to compare the fault detection capabilities of these techniques and the results are also compared to the Myers' original test generation technique.
Citation Count: 1
A Novel Countermeasure for Selective Forwarding Attacks in IoT Networks
(Institute of Electrical and Electronics Engineers Inc., 2022) Yaman, O.; Sokat, B.; Ayav, T.; Erten, Y.M.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
As the Internet of Things (IoT) devices become more widespread there are rising public concerns about whether or not IoT devices and their services are secure. One of the major threats they face is selective forwarding attacks performed by malicious nodes. Although packets can be lost inherently due to network conditions, malicious nodes, such as those performing blackhole attacks, may deliberately drop some, but not all of them. Therefore, distinguishing these nodes from legitimate ones is not so easy. This study has proposed a lightweight countermeasure to deal with this kind of attack in IoT networks, using the standard IPv6 Routing Protocol for Low Power and Lossy Networks (RPL). The mechanism is based on Mobile Trusted Nodes (MTNs). For the given threat model, we showed that our model has robust detection accuracy and brings no additional overhead to the network. © 2022 IEEE.
Optimal control for real-time feedback rate-monotonic schedulers
(2005) Ayav, T.; Ferrari-Trecate, G.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
This paper presents an optimal control scheme for a real-time feedback control rate-monotonie scheduling (FC-RMS) system. We consider two-version tasks composed of a mandatory and an optional part to be scheduled according to the FC-RMS. In FC-RMS, the controller provides a feedback strategy for deciding about the execution or rejection of the optional sub-tasks. By modeling the task execution times as random variables, we first find the statistical model of FC-RMS and then we design a pure optimal controller and an optimal controller with feedforward integral compensation. The comparison of these two schemes with common Proportional-Integral-Derivative (PID) controller highlights the benefit of the optimal scheme with integral compensation. The results are demonstrated through the real implementation of FC-RMS on RT-Linux. © Springer-Verlag Berlin Heidelberg 2005.
Citation Count: 11
A review of cloud deployment models for e-learning systems
(2013) Leloglu, E.; Ayav, T.; Aslan, B.G.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
With the significant growth in the cloud-based systems, many industries give their attention to cloud computing solutions. E-learning is a promising application area since its typical requirements such as dynamically allocation of computation and storage resources, coincide well with cloud characteristics. This paper presents some possible cloud solutions in e-learning environments by emphasizing its pros and cons. It is of paramount importance to choose the most suitable cloud model for an e-learning application or an educational organization in terms of scalability, portability and security. We distinguish various deployment alternatives of cloud computing and discuss their benefits against typical e-learning requirements. © 2013 IEEE.
Citation Count: 32
Solving the Course Scheduling Problem Using Simulated Annealing
(2009) Aycan, E.; Ayav, T.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
This paper tackles the NP-eomplete problem of academic class scheduling (or timetabling). The aim is to find a feasible timetable for the department of computer engineering in Izmir Institute of Technology. The approach focuses on simulated annealing. We compare the performance of various neighborhood searching algorithms based on so-called simple search, swapping, simple search-swapping and their combinations, taking into account the execution times and the final costs. The most satisfactory timetable is achieved with the combination of all these three algorithms. The results highlight the efficacy of the proposed scheme. © 2008 IEEE.
Citation Count: 8
Test input generation from cause–effect graphs
(Springer, 2021) Kavzak Ufuktepe, D.; Ayav, T.; Belli, F.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
Cause–effect graphing is a well-known requirement-based and systematic testing method with a heuristic approach. Since it was introduced by Myers in 1979, there have not been any sufficiently comprehensive studies to generate test inputs from these graphs. However, there exist several methods for test input generation from Boolean expressions. Cause–effect graphs can be more convenient for a wide variety of users compared to Boolean expressions. Moreover, they can be used to enforce common constraints and rules on the system variables of different expressions of the system. This study proposes a new mutant-based test input generation method, Spectral Testing for Boolean specification models based on spectral analysis of Boolean expressions using mutations of the original expression. Unlike Myers’ method, Spectral Testing is an algorithmic and deterministic method, in which we model the possible faults systematically. Furthermore, the conversion of cause–effect graphs between Boolean expressions is explored so that the existing test input generation methods for Boolean expressions can be exploited for cause–effect graphing. A software is developed as an open-source extendable tool for generating test inputs from cause–effect graphs by using different methods and performing mutation analysis for quantitative evaluation on these methods for further analysis and comparison. Selected methods, MI, MAX-A, MUTP, MNFP, CUTPNFP, MUMCUT, Unique MC/DC, and Masking MC/DC are implemented together with Myers’ technique and the proposed Spectral Testing in the developed tool. For mutation testing, 9 common fault types of Boolean expressions are modeled, implemented, and generated in the tool. An XML-based standard on top of GraphML representing a cause–effect graph is proposed and is used as the input type to the approach. An empirical study is performed by a case study on 5 different systems with various requirements, including the benchmark set from the TCAS-II system. Our results show that the proposed XML-based cause–effect graph model can be used to represent system requirements. The developed tool can be used for test input generation from proposed cause–effect graph models and can perform mutation analysis to distinguish between the methods with respect to the effectiveness of test inputs and their mutant kill scores. The proposed Spectral Testing method outperforms the state-of-the-art methods in the context of critical systems, regarding both the effectiveness and mutant kill scores of the generated test inputs, and increasing the chances of revealing faults in the system and reducing the cost of testing. Moreover, the proposed method can be used as a separate or complementary method to other well-performing test input generation methods for covering specific fault types. © 2021, The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature.
Citation Count: 2
Towards test case generation for synthesizable VHDL programs using model checker
(2010) Ayav, T.; Tuglular, T.; Belli, F.; Tuğlular, Tuğkan; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
VHDL programs are often tested by means of simulations, relying on test benches written intuitively. In this paper, we propose a formal approach to construct test benches from system specification. To consider the real-time properties of VHDL programs, we first transform them to timed automata and then perform model checking against the properties designated from the specification. Counterexamples returned from the model checker serve as a basis of test cases, i.e., they are used to form a test bench. The approach is demonstrated and complemented by a simple case study. © 2010 IEEE.
Citation Count: 2
Towards test case generation for synthesizable VHDL programs using model checker
(2010) Ayav, T.; Tuglular, T.; Belli, F.; Tuğlular, Tuğkan; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
VHDL programs are often tested by means of simulations, relying on test benches written intuitively. In this paper, we propose a formal approach to construct test benches from system specification. To consider the real-time properties of VHDL programs, we first transform them to timed automata and then perform model checking against the properties designated from the specification. Counterexamples returned from the model checker serve as a basis of test cases, i.e., they are used to form a test bench. The approach is demonstrated and complemented by a simple case study. © 2010 IEEE.
Yazilim Yapisal Kapsama Analizinde Testlerin Önceliklendirilmesi
(CEUR-WS, 2015) Ayav, T.; Ayav, Tolga; Bilgisayar Mühendisliği Bölümü
[No abstract available]